Prof. (Dr.) Pradeep Kumar

Dy. HoD- ECE and E&T / Professor

Amity School of Engineering and Technology
 
  • Teaching Interests

    Electronic Devices and Circuits, Basic Electronics Engineering, VHDL, Verilog, Digital Electronics etc.
  • Qualifications

    Graduation : B.Sc.(-)-1998,C.C.S. UNIVERSITY

    Post Graduation : M.Sc.(PHYSICS)-2000,C.C.S. University

    Doctorate : Ph.D.(PHYSICS)-2006,H.N.B. Garhwal University

  • Experience

    25 Sep 2006 - Present
    Dy. HoD- ECE and E&T / Professor,
    Amity School of Engineering and Technology

    01 Nov 2001 - 31 Dec 2002
    Lecturer,
    LLR Girls Polytechnic ,
    U.P.

    01 Jan 2000 - 01 Jan 2001
    Lecturer,
    N.C. College of Engg,
    Panipat, Haryana

  • Research Interests

    Microelectronics, VLSI design
  • Publications

    Voltage Mode Second Order Biquadratic Filters Using Single CCCII ,
    International Journal of Electronics Engineering

    Wide-band resistorless all-pass sections with single element tuning ,
    International Journal of Electronics

    High input impedance band pass, all pass, and notch filters using two CCII's ,
    HAIT Journal of Science and Engineering

    High Input Impedance Universal Biquadratic Filters Using Current Conveyors ,
    J. of Active and Passive Electronic Devices

    Universal Biquadratic Filter Using a Single Current conveyor ,
    J. of Active and Passive Electronic Devices

    High input impedance all-pass and notch filter configuration ,
    Indian Journal of Pure and Applied Physics

    Variable Q all-pass, notch and band-pass filters using single CCII ,
    FREQUENZ Journal of RF-Engineering and Telecommunications

    On adaptive HV AC based on a de-centralized algorithm using K:1 transmission protocol for autonomous wireless sensor network ,
    IEEE

    An approach to command missiles from ship after detection of enemy ,
    INCOS-11 KLU

    V-Multiplier using adders ,
    Amity University, Noida

    A high Q band pass filter using translinear current conveyor and unity gain buffer ,
    IEEE, I.I.T. Kharagpur

    Review of Active Elements for Analog Signal Processing ,
    PPIMT Hisar

    Leakage Current Control techniques in Nano Scaled CMOS circuits ,
    NIEC, New Delhi

    Vehicle detection using seismic sensor network ,
    PPIMT Hisar

    A current sense amplifier for on-Chip Caches ,
    Inderaprastha Engineering College, Ghaziabad

    A User Programmable Electro-Optic Device for Testing Laser Seekers ,
    Defence Science Journal

    Current Mode High Q band-pass filter using plus type CCIIs and grounded capacitors only ,
    Journal of Active and Passive Electronic Devices(U.S.A.)

    Performance analysis of different PN sequence and Orthogonal Spreading sequences in DS-SS ,
    IEEE

    Neural Network based indicative ECG classification ,
    IEEE

    An approach to implement LMS and NLMS adaptive noise cancellation algorithm in frequency domain, ,
    IEEE

    RGB Image Steganography on Multiple Frame Video using LSB Technique ,
    IEEE

    OIV-CMOS: A Novel Approach towards Leakage Power Reduction ,
    IEEE

    An Approach to Implement VSS-LMS Algorithm in Frequency Domain for Adaptive Noise Cancellation ,
    IEEE

    Analysis and Implementation of Ripple and Area Efficient Charge Pump Circuits ,
    IEEE

    Analysis and comparison of Leakage Reduction Techniques in CMOS circuits ,
    IEEE

    Profiling and Optimization of Variable Step Size Algorithm used for Adaptive Noise Cancellation ,
    IEEE

    Performance analysis of least mean square algorithm for different step size parameters with different filter order and iterations ,
    IEEE

    An efficient MAC unit with low area consumption ,
    IEEE

    Design and Implementation of Low Power Clock Gated 64-Bit ALU on Ultra Scale FPGA ,
    AIP

    Power Efficient, Clock Gated Multiplexer Based Full Adder Cell Using 28nm Technology ,
    AIP

    Design and implementation of MAC unit based on Vedic Square, and its application ,
    IEEE

    A Methodology for Behavioral Modeling of 10-Bit Pipelined ADCs with Modified Digital Error Correction Logic ,
    IEEE Computer Society

    Analysis of SRAM Bit Cell Topologies in Submicron CMOS Technology ,
    United Kingdom Simulation Society

    Design and Simulation of 16x8 synchronous SRAM in 90nm CMOS Technology ,
    Springer

    An efficient multistage security system for user authentication ,
    IEEE

    Physical design implementation of 32-bit AMBA ASB APB module with improved performance ,
    IEEE

    SSVM Classifier and Hand Gesture based Sign Language Recognition ,
    IEEE

    Low power and temperature compatible FinFET based full adder circuit with optimised area ,
    IEEE

    Intelligent Multilevel Car Parking System Using RFID ,
    United Kingdom Simulation Society

    Detection and Alerting of Common Cardiac Conditions Using a Real-time Heartbeat Rate Monitoring System ,
    International Science Press

    Real-Time Heartbeat Rate Monitoring System using Raspberry Pi ,
    International Science Press

    Effect of Surface Passivation on the Electrical Characteristics of Nanoscale AlGaN/GaN HEMT ,
    Elsevier: Materials Today Proceedings

    EMG Signal Analysis Of Healthy And Neuropathic Individuals ,
    Elsevier: Materials Today Proceedings

    A boosted negative bit-line SRAM with write-assisted cell in 45 nm CMOS technology ,
    Journal of Semiconductors, IOP Publishing

    A dual Vt disturb-free subthreshold SRAM with write-assist and read isolation ,
    Journal of Semiconductors, IOP Publishing

    A Survey with Emphasis on Adaptive filter, Structure, LMS and NLMS Adaptive Algorithm for Adaptive Noise Cancellation System ,
    Eastern Macedonia and Thrace Institute of Technology

    Designing Dual Port RAM for Testability ,
    P P House

    Implementation of High Signal to Error Variable Logarithmic Based Quantization Steps for Continuous Time Analog to Digital Converter ,
    Serial Publications

    Fast integral image computing scheme for vision based pplications ,
    IEEE

    Effect of Substrate Material on Sensing Behaviour of SAW Based Gas Sensors ,
    IEEE

    Analysis of multilayered SAW based gas sensor ,
    IEEE

    Multiphysics simulation of InP NWT for high speed digital applications ,
    IEEE

    Analysis of schottky barrier indium arsenide nanowire MOSFET for high frequency application ,
    IEEE

    Thermal analysis of III-V transistor at high frequencies ,
    IEEE

    HDL implementation of high performance 16 bit processor on FPGA ,
    IEEE

    Simulation of Self-Heating Effect for Different Gate Lengths and its Influence on DC Characteristics of AlGaN/GaN HEMT ,
    IEEE

    Enhanced AES Architecture using Extended Set ALU at 28nm FPGA ,
    IEEE

    16 Bit Power Efficient Carry Select Adder ,
    IEEE

    Optimization of Adaptive Noise Canceller with Grey Wolf Optimizer for EEG/ERP Signal Noise Cancellation ,
    IEEE

    An optimal approach for EEG/ERP noise cancellation using Adaptive Filter with Oppositional Whale Optimization Algorithm ,
    World Scientific Publishing

    Simulation analysis of wireless power transfer for future office communication systems ,
    Blue Eyes Intelligence Engineering & Sciences Publication

    A Hybrid Optimization Method OWGWA for EEG/ERP Adaptive Noise Canceller With Controlled Search Space ,
    IGI Global Publishing Hershey, PA, USA

    Power and Area Efficient Vedic Multipliers Using Modified CSLA Architectures for DSP ,
    Institute of Advanced Scientific Research

    FFT using power efficient vedic multiplier ,
    Blue Eyes Intelligence Engineering & Sciences Publication

    Noise reduction from ECG signal using error normalized step size least mean square algorithm (ENSS) with wavelet transform ,
    Springer

    High Input Impendance Biquadratic Filter Using Three Translinear Current Conveyors and Ground Capacitors ,
    IEEE

    Implementation of Normalized Data Non-Linearity and Constraint Stability Least Mean Square algorithm with a new SuFee model for Adaptive Noise Cancellation ,
    IEEE

    Wireless Power Transfer to Low Power Devices ,
    IEEE

  • Affiliations

    IET Since 12 Jun 2013

  • Conferences attended

    Advanced VLSI and Embedded Technology
    Organized By :Northern India Engineering College

    Sports Biomechanics, Emerging Technologies & Quality Assurance in Technical Education
    Organized By :PPU

    Recent Trends in Engineering & Technology
    Organized By :PPIMT

    Mini-Colloquia on "Compact Modelling Techniques for Nanoscale Devices and Circuit Analysis"
    Organized By :University of Delhi South Campus

    Embedded Systems
    Organized By :JSS ATE

    " ANSYS' HFSS Software"
    Organized By :ECE, ASET

    VLSI Design Techniques
    Organized By :ECE, ASET

    LAB VIEW SOFTWARE & INTERFACING
    Organized By :ECE, ASET, AUUP, NOIDA

    EMERGING NAVIGATION TECHNOLOGIES
    Organized By :ECE, ASET, AUUP, NOIDA

    HIGHER EDUCATION IN EUROPE: PROSPECTS AND PERSPECTIVES
    Organized By :Jointly organized by Amity Institute of Social Sciences (AISS) and Erasmus Mundus Association and its India Chapter (EMA Indian Chapter)

    'Mobile Communication and Embedded Technology' (MECON-2013),
    Organized By :ECE, ASET, AUUP, NOIDA

    VLSI, MEMS & NEMS
    Organized By :ECE, ASET, AUUP

    Industry Interaction On Sub Micron Challenges in VLSI Industry
    Organized By :ECE, ASET, AUUP, NOIDA

    SIGNAL PROCESSING & INTEGRATED NETWORKS SPIN 2014
    Organized By :ECE, ASET

    Citation Analysis, Impact Factor, Patent and Copyrights for Maximizing Research Impact
    Organized By :PHD Chamber of Commerce and Industry, PHD House, New Delhi

    HOW TO GET PUBLISHED IN RESEARCH JOURNALS
    Organized By :AUUP

    Microcontrollers & Robotics
    Organized By :ASET

    Hands -On Workshop on Labview
    Organized By :ASET

    Modeling and Simulation with Simulink
    Organized By :ASET

    How To Write Project Proposal For External Funding
    Organized By :ASET

    National Conference on RF and Wireless Communication Networks (NCRWCN-2014)
    Organized By :Amity School of Engineering and Technology BIJWASAN

    2nd International Conference on Signal Processing and Integrated Networks (SPIN-2015)
    Organized By :ASET, AUUP

    International Conference RDCAPE-2015)
    Organized By :ASET, AUUP

    Workshop on Session Plan, Assessment Plan for Effective Learning Outcomes
    Organized By :AUUP

    COMSOL Multiphysics Modeling Workshop
    Organized By :AUUP

    Embedded Linux on Zynq-7000 SOC using Vivado
    Organized By :ASET, AUUP

    4th International Conference on Signal Processing and Integrated Networks (SPIN) 2017
    Organized By :ASET, AUUP

    3rd International Conference on Signal Processing and Integrated Networks (SPIN) 2016
    Organized By :ASET, AUUP

    Shannon 100, 3rd International Conference on Computing Sciences
    Organized By :LPU, Punjab

    5th International Conference on Signal Processing and Integrated Networks, SPIN-2018
    Organized By :ASET, AUUP

  • Scholary Activities

    Industry Interaction On Sub Micron Challenges in VLSI Industry
    Organized By :ECE, ASET, AUUP, NOIDA

  • Short Description

    Working as a AP-III in the Department of Electronics & Communication Engineering