Mr Paurush Bhulania

Asst. Professor (Grade - II)

Amity School of Engineering and Technology
 
  • Qualifications

    Graduation : B.Tech(Electronics & Comm)-2007,Punjab Technical University

    Post Graduation : M.Tech(VLSI)-2010,Guru Gobind Singh Indra Prasth University

  • Experience

    14 Jul 2010 - Present
    Asst. Professor (Grade - II),
    Amity School of Engineering and Technology

  • Publications

    Design and Analysis of Optimum Performance Memory Decoders ,
    NCVDES

    Design & Analysis of High Speed Memory Decoder ,
    ASET, Noida

    Design & Implementation of On-Chip voltage regulator on 350nm ,
    ASET, Noida

    lecture attendance system with face recognition and image processing ,
    IJARSE

    A 3.1–10.6 GHz Ultra-Wideband CMOS Differential LNA Design ,
    ICRTAE

    An Approach for Analytical Modeling and Simulation of Gate All Around MOSFET for 50 nm technology ,
    AMITY UNIVERSITY NOIDA

    A Novel Design of Fiber Optic Gyroscope Based INS System for UAS Applications ,
    SRM UNIVERSITY, UP

    Designing of High Speed Floating Gate Differential Ring RLC VCO with Error-tracking MISO Filter for Low Noise Applications ,
    ICACCE-2015 (IEEE)

    A NOVEL SOLUTION OF DIJKSTRA’S ALGORITHM FOR SHORTEST PATH ROUTING WITH POLYGONAL OBSTACLES IN WIRELESS NETWORKS USING FUZZY MATHEMATICS ,
    Springer India

  • Patents

    Double differential ring oscillator architecture with low power, low noise and high stability factor for high speed serial link in RF range ,Noida,India - Complete ( 1674/ DEL/ 2015 )

  • Conferences attended

    VMN2012
    Organized By :ASET, Amity University, Noida

    Emerging Navigation Technologies
    Organized By :AASC

    SPIN 2014
    Organized By :ASET